1. Field of the Invention
This invention relates to a communication receiver which has a function to adjust a local frequency following a reception signal.
2. Description of the Prior Art
FIG. 8 is a block diagram showing a main part of a conventional receiver which has a function to adjust a local frequency. In this figure, numeral 10 denotes a voltage controlled temperature compensated crystal oscillator (hereinafter referred to as VC-TCXO) as a reference frequency oscillator, numeral 20 denotes a Phase Locked Loop (PLL) circuit for synthesizing a plurality of frequencies as first local frequencies, numeral 30 denotes a first mixer which mixes a reception signal with signals outputted from the PLL 20, numeral 40 denotes a second local oscillator which produces a signal having a frequency f.sub.LO2, numeral 50 denotes a second mixer which mixes signals outputted from the first mixer 30 with the signal outputted from the second local oscillator 40, numeral 60 denotes a first counter which counts the frequency of a signal outputted from the second local oscillator 40, numeral 70 denotes a second counter which counts the frequency of a signal outputted from the second mixer 50, numeral 80 denotes an arithmetic processing unit for performing arithmetic processes in order to make the frequency of the VC-TCXO 10 converge fast based on the count results of the first counter 60 and the second counter 70, numeral 90 denotes a digital to analog (D/A) converter for supplying a control voltage to the VC-TCXO 10 based on the result of the arithmetic processes of the arithmetic processing unit 80. The PLL 20 consists of phase comparator 21, Low Pass Filter (LPF) 22, Voltage Controlled Oscillator (VCO) 23 and variable divider 24.
FIG. 9 shows deviations of the frequency of the signal outputted from the PLL 20 and the way in which the frequency is converged. FIG. 10 is a flow chart showing procedures for making the frequency deviation fall within a permissible range. Let f.sub.IF1 be the frequency of the signal outputted from the first mixer 30 and let f.sub.IF2 be the frequency of a signal outputted from the second mixer 50. Then, the following equations are established. EQU f.sub.IF1 =f.sub.RX -f.sub.LO, f.sub.IF2 =f.sub.LO2 -f.sub.IF1.
NOW, let .DELTA.f.sub.LO be a frequency deviation of a signal outputted from the V.C.O. 23, the following equations are established. EQU f'.sub.IF1 =f.sub.RX -(f.sub.LO +.DELTA.f.sub.LO), EQU f'.sub.IF2 =f.sub.LO2 -f.sub.RX +f.sub.LO +.DELTA.f.sub.LO =f.sub.LO2 -f.sub.IF1 +.DELTA.f.sub.LO.
The equation f'.sub.IF2 -f.sub.LO2 +f.sub.IF1 =.DELTA.f.sub.LO is accordingly obtained. Therefore, the frequency deviation .DELTA.f.sub.LO is obtained using this equation. Then, the frequency deviation .DELTA.f of a signal outputted from the VC-TCXO 10 is worked out based on the deviation .DELTA.f.sub.LO.
The threshold frequencies -y [Hz], -x [Hz], x [Hz] and y [Hz] are set on the deviation frequency axis as shown in FIG. 9. Frequency ranges between -x[Hz] and x[Hz], between -y[Hz]and -x[Hz], between x[Hz] and y[Hz], lower than -y[Hz], and higher than y[Hz] are respectively referred to as A, B, C, D, and E. The range A is a permissible range of the frequency deviation of the VC-TCXO 10.
The detected frequency deviation is compared to each threshold frequency and the range to which the detected deviation belongs is judged. In each range, the voltage supplied to the VC-TCXO 10 is changed by a value corresponding to each range. The VC-TCXO 10 oscillates at a frequency according to the supplied voltage. That is, based on the count values counted at the first counter 60 and the second counter 70, the arithmetic processing unit 80 calculates the frequency deviation .DELTA.f of the VC-TCXO 10 at step S901. At step S902, the arithmetic processing unit 80 checks whether the frequency deviation .DELTA.f is within the range D or not. When the frequency deviation is within the range D, the voltage supplied to the VC-TCXO 10 is increased in the amount of a at step S903 and the sequence moves to step S901. Otherwise, the arithmetic processing unit 80 checks whether the frequency deviation .DELTA.f is within the range B or not at step S904. When the frequency deviation is within the range B, the voltage supplied to the VC-TCXO 10 is increased in the amount of b at step S905 and the sequence moves to step S901. Otherwise, the arithmetic processing unit 80 checks whether the frequency deviation .DELTA.f is within the range C at step S906. When the frequency deviation .DELTA.f is within the range C, the voltage supplied to the VC-TCXO 10 is decreased in the amount of b at step S907 and the sequence moves to step S901. Otherwise, the arithmetic processing unit 80 checks whether the frequency deviation .DELTA.f is within the range E or not at step S908. When the frequency deviation .DELTA.f is within the range E, the voltage supplied to the VC-TCXO 10 is decreased in the amount of a at step S909 and the sequence moves to step S901. Otherwise, the receiver indicates that the frequency deviation of the VC-TCXO 10 is within the permissible range at step S910.
An example of frequency convergence depicted in FIG. 9 will be explained. When the first frequency deviation .DELTA.f.sub.1 is within the range E, a control voltage supplied to the VC-TCXO 10 is decreased by a [V] corresponding to the range E. The arithmetic processing unit 80 calculates the second frequency deviation .DELTA.f.sub.2 based on the count values of counters 60 and 70. When the second frequency deviation .DELTA.f.sub.2 is also within the range E, a control voltage supplied to the VC-TCXO 10 is decreased by a [V] again. The arithmetic processing unit 80 calculates the third frequency deviation .DELTA.f.sub.3 based on the count values of counters 60 and 70. When the third frequency deviation .DELTA.f.sub.3 is now within the range C, a control voltage supplied to the VC-TCXO 10 is decreased by b [IV] corresponding to the range C. The arithmetic processing unit 80 calculates the fourth frequency deviation .DELTA.f.sub.4 based on the count values of counters 60 and 70. When the fourth frequency deviation .DELTA.f.sub.4 is also within the range C, a control voltage supplied to the VC-TCXO 10 is decreased by b [V] again. The arithmetic processing unit 80 calculates the fifth frequency deviation .DELTA.f.sub.5 based on the count values of counters 60 and 70. When the fifth frequency deviation .DELTA.f.sub.5 is within the range A, the arithmetic processing unit 80 indicates that the frequency deviation of the VC-TCXO 10 is within the permissible range.
However, the above explained receiver has the following problem. Namely, a long time is needed for the frequency of the VC-TCXO 10 to converge within the permissible range and reduction of the time necessary for convergence is desired.
The related technology is described on "Measuring Method of Received Signal Frequency in Mobile Communication", the electronics and communication society, communication section, nationwide meeting 1986, No. 449.